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#hardwaredesign

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You have 5 bits for the hour of the day in a clock chip register. Do you just use a binary representation from 0x2x0_0001 to 0x2x1_0111?

No. That would be too easy. Programmers might use your hardware, and that would never do.

So you make bit 4 mean add ten to the value in the lower four bits, and document hour 23 as being hour 13+10.

And for kicks you do that for the 5 bit month number register, too. Because 4 bits storing just 0x2x0001 to 0x2x1100 would just let those pesky programmers in, again.

What on Earth were these chip designers on? BCD, I could understand. Even giving midnight the value 8 I could understand. But this scheme is just mad.

files.seeedstudio.com/wiki/Pi_

After getting a basic ALU design done yesterday & starting a **very** rough start at a microcodeish thing, today the first design of the controlunit & overall cpu design comes together, so it can actually calculate an addition from two arbitary registers and store the result back into a register of choice! :3

Still a lot to go but excited it works already somewhat! #hardware #fantasyconsole #diy #verilog #systemverilog #software #cpudesign #hardwaredesign #fpga #fpgadev

Baby steps in getting my Apple I reproduction PCB up and running. 6502 CPU booting with just RAM and ROM attached. It grabs the reset address from ROM and starts executing code...until it tries to do something with IO, which is not attached yet...

I'm monitoring the bus with an Arduino MEGA attached to my MacBook Pro.

After extensive testing, here’s a 3D model of a Velcro-equipped speaker casing. Designed for a design session where users can explore different placements on a wearable element. As always, modeled with FreeCAD. #3DModeling #WearableTech #SpeakerDesign #FreeCAD #ProductDesign #Prototyping #TechInnovation #IndustrialDesign #OpenSource #HardwareDesign #Engineering #DesignThinking #CAD #Makers #DIY #Acoustics #ElectronicsEnclosure #FLOSS #design #uidesign #tui #wearable

Software based innovation is a sloppy, lazyway towards innovation. Learn form Apple's example, they used hardware and their 'made for ipad' and dongle accessories extension to drive real innovation & technological advancement. Software upgrades and addons and customizations are sad excuse to innovate.

Don't fall into the delusion that interfaces and UX through software is progress.

Apple plant die Veröffentlichung eines faltbaren iPhones ab 2026
Apple könnte bereits im Jahr 2026 ein faltbares iPhone einführen, berichtet The Information. Dies könnte das größte Hardware-Design-Upgrade für da
apfeltalk.de/magazin/news/appl
#iPhone #News #Apple #FaltbaresIPhone #HardwareDesign #Huawei #Kameraupgrade #KnstlicheIntelligenz #Produktentwicklung #Samsung #SmartphoneMarkt #Technologiemarkt #Zulieferer

The 1st FPGA Developers' Forum is about to kick off at CERN, chaired by the MPP scientist Davide Cieri. From today, June 11 to 13, experts at the will discuss the use of reprogrammable FPGA chips for cutting-edge applications in both science and industry. Topics to be covered are machine learning, the creation of reusable IP cores and effective techniques for signal management. (Photo: MPP)

mpp.mpg.de/en/news/news/mpi-fu

www.mpp.mpg.deMPI for Physics launches international initiative for chip technologyEine neues Forum für FPGA-(Field Programmable Gate Arrays) Anwendungen hält seine erste Konferenz am CERN. Ziel: Bildung eines Netzwerks um aktuelle und künftige Einsatzgebiete zu diskutieren und sich über Erfahrungen und Probleme auszutauschen.

I've just published the latest installment of the Flash eBike blog series. In this episode, I began reverse engineering the head and tail lamps. It was an interesting exploration of the LIN protocol data, and the construction of the lamps themselves. They're incredibly well-, if not over-, built.

housedillon.com/blog/flash-par

Also, I'm giving a talk at BSidesPDX 2023 featuring this content. If you're in the area, please stop by. I'd like to meet you!

housedillon.comFlash e-bike Part 8 (Head and Tail Lamps)