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#papers

1 post1 participant0 posts today
Reverse-Engineering
Algorithms For Black-Box, Physical-to-DRAM Address-Mapping Recovery (Georgia Tech, CNRS, Et Al.) A new technical paper titled “Knock-Knock: Black-Box, Platform-Agnostic DRAM Address-Mapping Rever...

#Architectures #Memory #Security #Technical #Papers #CentraleSupelec #CNRS #DRAM #ESILV #Georgia #Tech

Origin | Interest | Match
Semiconductor Engineering · Algorithms For Black-Box, Physical-to-DRAM Address-Mapping Recovery (Georgia Tech, CNRS, Et Al.)A new technical paper titled “Knock-Knock: Black-Box, Platform-Agnostic DRAM Address-Mapping Reverse Engineering” was published by researchers at Georgia Tech, ESILV, CentraleSupelec, Inria, CNRS, IRISA. Abstract “Modern Systems-on-Chip (SoCs) employ undocumented linear address-scrambling functions to obfuscate DRAM addressing, which complicates DRAM-aware performance optimizations and hinders proactive security analysis of DRAM-based attacks; most notably, Rowhammer. Although previous... » read more
2rZiKKbOU3nTafniR2qMMSE0gwZ
Undervolting Attack That Exploits The Vulnerability Of Chips During Brownout Conditions (Worcester Polytechnic, RUB) A new technical paper titled “Chypnosis: Stealthy Secret Extraction using Unde...

#Power #& #Performance #Security #Technical #Papers #cybersecurity #hardware #security #physical #side-channel

Origin | Interest | Match
Semiconductor Engineering · Undervolting Attack That Exploits The Vulnerability Of Chips During Brownout Conditions (Worcester Polytechnic, RUB)A new technical paper titled “Chypnosis: Stealthy Secret Extraction using Undervolting-based Static Side-channel Attacks” was published by researcher at Worcester Polytechnic Institute and Ruhr University Bochum. Abstract: “Static side-channel analysis attacks, which rely on a stopped clock to extract sensitive information, pose a growing threat to embedded systems’ security. To protect against such attacks, several... » read more
#sidechannel
SearchEngine
Analog Plus 3D Optics to Accelerate AI inference and Combinatorial Optimization (Microsoft, Cambridge) A new technical paper titled “Analog optical computer for AI inference and combinatorial opt...

#AI/ML/DL #Architectures #Memory #Optoelectronics #/ #Photonics #Power #& #Performance #Technical #Papers

Origin | Interest | Match
Semiconductor Engineering · Analog Plus 3D Optics to Accelerate AI inference and Combinatorial Optimization (Microsoft, Cambridge)A new technical paper titled “Analog optical computer for AI inference and combinatorial optimization” was published by researchers at Microsoft Research, Barclays and University of Cambridge. Abstract “Artificial intelligence (AI) and combinatorial optimization drive applications across science and industry, but their increasing energy demands challenge the sustainability of digital computing. Most unconventional computing systems target... » read more
#aimldl
Memristors
Neuromorphic Computing: Memristor Based On Vertically Aligned Nanocomposite With Highly Defective Vertical Channels (Purdue, UT Arlington) A new technical paper titled “An Ultra-Robust Memristor ...

#Architectures #Design #& #Verification #Materials #Memory #Power #& #Performance #Technical #Papers

Origin | Interest | Match
Semiconductor Engineering · Neuromorphic Computing: Memristor Based On Vertically Aligned Nanocomposite With Highly Defective Vertical Channels (Purdue, UT Arlington)A new technical paper titled “An Ultra-Robust Memristor Based on Vertically Aligned Nanocomposite with Highly Defective Vertical Channels for Neuromorphic Computing” was published by researchers at Purdue University and University of Texas at Arlington. “In this work, a memristor based on SrTiO3-CeO2 (S-C) VAN thin films with highly defective vertical interfaces has been successfully demonstrated... » read more
LLMs
Overview of Incorporating LLMs into EDA, With 3 Case Studies (TU Munich et al.) A new technical paper titled “Large Language Models (LLMs) for Electronic Design Automation (EDA)” was published ...

#AI/ML/DL #Architectures #Design #& #Verification #Manufacturing #Technical #Papers #Test, #Measurement, #Analytics

Origin | Interest | Match
Semiconductor Engineering · Overview of Incorporating LLMs into EDA, With 3 Case Studies (TU Munich et al.)A new technical paper titled “Large Language Models (LLMs) for Electronic Design Automation (EDA)” was published by researchers at the Technical University of Munich, University of Stuttgart, New York University, and University of Siegen. Abstract “With the growing complexity of modern integrated circuits, hardware engineers are required to devote more effort to the full design-to-manufacturing... » read more
#aimldl#test#measurement
2rZiKKbOU3nTafniR2qMMSE0gwZ
HW Security: 2.5D and 3D Technologies Provide Opportunities in Designing Secure Systems (UCSB, Columbia) A new technical paper titled “Leveraging 3D Technologies for Hardware Security: Opportunit...

#Architectures #Design #& #Verification #Memory #Packaging #Security #Technical #Papers #2.5D #interposer

Origin | Interest | Match
Semiconductor Engineering · HW Security: 2.5D and 3D Technologies Provide Opportunities in Designing Secure Systems (UCSB, Columbia)A new technical paper titled “Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges” was published by researchers at the University of California, Santa Barbara and Columbia University. Abstract “3D die stacking and 2.5D interposer design are promising technologies to improve integration density, performance and cost. Current approaches face serious issues in dealing with emerging... » read more
#25d
2rZiKKbOU3nTafniR2qMMSE0gwZ
Operational Cybersecurity and Supply Chain Risks Across the AI Lifecycle (Sandia National Labs) A new technical paper titled “Surveying the Operational Cybersecurity and Supply Chain Threat Lands...

#AI/ML/DL #Architectures #Design #& #Verification #Power #& #Performance #Security #Technical #Papers

Origin | Interest | Match
Semiconductor Engineering · Operational Cybersecurity and Supply Chain Risks Across the AI Lifecycle (Sandia National Labs)A new technical paper titled “Surveying the Operational Cybersecurity and Supply Chain Threat Landscape when Developing and Deploying AI Systems” was published by researchers at Sandia National Labs. Abstract “The rise of AI has transformed the software and hardware landscape, enabling powerful capabilities through specialized infrastructures, large-scale data storage, and advanced hardware. However, these innovations... » read more
#aimldl
2rZiKKbOU3nTafniR2qMMSE0gwZ
2025 Critical Hardware Weaknesses (Hardware CWE Special Interest Group) A new technical paper titled “2025 Most Important Hardware Weaknesses” was published by researchers at Hardware CWE Speci...

#Security #Technical #Papers #access #control #CWE #cybersecurity #debug #Hardware #CWE #Special

Origin | Interest | Match
Semiconductor Engineering · 2025 Critical Hardware Weaknesses (Hardware CWE Special Interest Group)A new technical paper titled “2025 Most Important Hardware Weaknesses” was published by researchers at Hardware CWE Special Interest Group. Excerpt “The Most Important Hardware Weaknesses (MIHW) empowers organizations with the knowledge to proactively strengthen hardware security and reduce risks at the source. The 2025 CWE MIHW represents a refreshed and enhanced effort to identify... » read more
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